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Wafer Level 3-D ICs Process Technology Empty Wafer Level 3-D ICs Process Technology

Miér Dic 02, 2020 2:20 pm

Wafer Level 3-D ICs Process Technology Dpml53222f8us0j7z
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Wafer Level 3-D ICs Process Technology
pdf | 14.31 MB | English | Isbn:B00A9YG6QO |
Author: Chuan Seng Tan | PAge: 365 | Year: 2009

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This book focuses on foundry-based process technology that enables the fabrication of 3-D ICs. The core of the book discusses the technology platform for pre-packaging wafer lever 3-D ICs. However, this book does not include a detailed discussion of 3-D ICs design and 3-D packaging. This is an edited book based on chapters contributed by various experts in the field of wafer-level 3-D ICs process technology. They are from academia, research labs and industry.

Category:Microelectronics Engineering, Optics Engineering, Circuit Engineering


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